Description:
- To read and write registers
- A set of 32/64 registers indexed from x0 to xn-1
- Convention, each register also has a name:
- x16 - x23 → s0-s7 (“s registers”)
- x8 - x15 → t0 - t7 (“t registers”)
- Has Decoder to choose the write register and Multiplexer to read
- Detain bit is 1 when writing to prevents unintended writes
- Has 2 Mux to read from 1 addresses because many arithmetic operations in processors involve two operands